Patent · US Active

Method to protect an IC layout

US10216963B2 · kind B2 · utility

1Cited by

11References

20Claims

0Family size

Assignee

ANAGLOBE TECHNOLOGY, INC. · TW

Inventors

Yi Su · Hsinchu, TW
Chung-Cheng Lee · Hengshan, TW
Hung Yeh Chen · Hsinchu, TW

Key dates

Filing date	Dec 12, 2016
Grant date	Feb 26, 2019
Priority date	—
Expiry date	Jul 6, 2037

Classification

Technology area (CPC G)Physics
CPC primaryG06F30/39
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

The method, executed by at least one processor of a computer, of an encrypting or a decrypting method for an IC layout is proposed. The encrypting method comprises getting a record of an IC layout object from a database. Data of the IC layout object is appended into a byte array. The byte array is encrypted into a second byte array. Each byte of the second byte array is defined as an encryption value to create multiple encryption values. Finally, an encryption object with multiple encryption values is created on a specified layer.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.