Analog-to-digital converter calibration system
US10218373B1 · kind B1 · utility
Assignees
Inventors
Key dates
| Filing date | May 29, 2018 |
| Grant date | Feb 26, 2019 |
| Priority date | — |
| Expiry date | May 29, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/1215
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An ADC calibration system includes a clock generating circuit, under test ADCs, a standard ADC, and a calibration circuit. The clock generating circuit generates operation clocks according to a system clock, and generates a calibration clock according to the system clock and a selection signal. The under test ADCs sample an input signal according to the operation clocks to output under test sampling results. The standard ADC samples the input signal according to the calibration clock to output a standard sampling result. The calibration circuit makes the phases of the calibration clock and a first operation clock received by a first ADC to be the same. The calibration circuit compares the standard sampling result with a first under test sampling result to generate calibration information corresponding to the first under test sampling result, and calibrates the first under test sampling result according to the calibration information.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.