Secure device state apparatus and method and lifecycle management
US10223531B2 · kind B2 · utility
2Cited by
20References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 30, 2016 |
| Grant date | Mar 5, 2019 |
| Priority date | — |
| Expiry date | Apr 15, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2029/4402
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor chip device include device state fuses that may be used to configure various device states and corresponding security levels for the semiconductor chip as it transitions from wafer manufacturing to provisioned device. The device states and security levels prevent the semiconductor chip from being accessed and exploited, for example, during manufacturing testing. A secure boot flow process for a semiconductor chip over its lifecycle is also disclosed. The secure boot flow may start at the wafer manufacturing stage and continue on through the insertion of keys and firmware.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.