Patent · US Active

Apparatus, method and corresponding computer program for generating an error concealment signal using power compensation

US10224041B2 · kind B2 · utility

7Cited by

14References

15Claims

0Family size

Assignee

Fraunhofer-Gesellschaft zur förderung der angewandten Forschung e.V. · DE

Inventors

Michael Schnabel · Lauffen am Neckar, DE
Jérémie Lecomte · Santa Clara, US
Ralph Sperschneider · Erlangen, DE
Manuel Jander · Hemhofen, DE

Key dates

Filing date	Sep 16, 2016
Grant date	Mar 5, 2019
Priority date	—
Expiry date	Dec 20, 2036

Classification

Technology area (CPC G)Physics
CPC primaryG10L2019/0016
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

Disclosed are techniques for generating an error concealment signal, where such techniques may include an LPC representation generator for generating a replacement LPC representation; a gain calculator for calculating a gain information from the LPC representations; a compensator for compensating a gain influence of the replacement LPC representation using the gain information; and an LPC synthesizer for filtering codebook information using the replacement LPC representation to obtain the error concealment signal, where the compensator is configured for weighting the codebook information or an LPC synthesis output signal.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.