Shift register unit, driving method thereof, gate driver circuit and display device
US10224112B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 4, 2016 |
| Grant date | Mar 5, 2019 |
| Priority date | — |
| Expiry date | Nov 4, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2320/0252
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A shift register unit, a driving method thereof, a gate driver circuit and a display device are provided. The shift register unit includes a first pull-up node control unit, a second pull-up node control unit configured to enable a pull-up node to be at a first level at a pull-down maintenance stage under the control of a first clock signal, a first pull-down node control unit configured to enable a pull-down node to be at a second level at the pull-down maintenance stage under the control of the first clock signal, a second pull-down node control unit, a gate driving signal output unit configured to output a gate driving signal under the control of the pull-up and pull-down nodes, and a carry signal output unit configured to enable a carry signal output end to output a carry signal under the control of the pull-up and pull-down nodes.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.