Patent · US Active

Protecting in-memory immutable objects through hybrid hardware/software-based memory fault tolerance

US10224967B2 · kind B2 · utility

7Cited by
1References
20Claims
0Family size

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Inventors

Key dates

Filing dateFeb 7, 2017
Grant dateMar 5, 2019
Priority date
Expiry dateMar 19, 2037

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH03M13/293
  • WIPO fieldBasic communication processes
  • WIPO sectorElectrical engineering

Abstract

A system, method and program product that utilizes a hybrid fault tolerance system for managing data. A system includes: a system for partitioning memory into a set of partitions that includes a designated partition for storing immutable objects; a write system for storing an immutable object in the designated partition, wherein the immutable object is coded with a hardware-based fault tolerance system to generate a set of hardware-based codewords, and wherein the immutable object is further coded with a software-based fault tolerance system to generate a set of software-based codewords; a read system for retrieving the immutable object, wherein the read system decodes each hardware-based codeword for immutable object, and in response to a failed decoding of a hardware-based codeword, the read system decodes the software-based codeword containing a failed hardware-based codeword.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.