High-performance key-value store using a coherent attached bus
US10225344B2 · kind B2 · utility
1Cited by
5References
9Claims
0Family size
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Key dates
| Filing date | Aug 12, 2016 |
| Grant date | Mar 5, 2019 |
| Priority date | — |
| Expiry date | Nov 19, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F15/17331
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An infrastructure for servicing remote direct memory access (RDMA) requests without the need to pin memory and/or register memory for access by only a single RDMA adapter. Rather, RDMA requests can be coherently serviced from memory accessible to multiple adapters, and that memory can be flexibly managed (such as by swapping it out of main memory or moving it around within main memory). This coherent servicing of RDMA requests is achieved through the use of a coherent attached bus connecting the RDMA adapters to main memory that owns the address space.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.