Technologies for automatic timing calibration in an inter-integrated circuit data bus
US10229086B2 · kind B2 · utility
4Cited by
13References
25Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 26, 2015 |
| Grant date | Mar 12, 2019 |
| Priority date | — |
| Expiry date | May 16, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/4282
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Technologies for controlling timing calibration of a dedicated inter-integrated circuit data bus by a primary microcontroller are disclosed. The primary microcontroller performs a data transfer with a secondary integrated circuit using the dedicated inter-integrated circuit data bus, and determines a duration of the data transfer. If the duration is outside of an acceptable range, the primary microcontroller updates one or more data transfer timing parameters so that the duration of future data transfers are closer to the acceptable range.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.