Systems, methods, and apparatuses for implementing late fusing of processor features using a non-volatile memory
US10229883B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 1, 2016 |
| Grant date | Mar 12, 2019 |
| Priority date | — |
| Expiry date | Mar 6, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/4401
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In accordance with disclosed embodiments, there are provided systems, methods, and apparatuses for implementing late fusing of processor features using a non-volatile memory. For instance, there is disclosed in accordance with one embodiment a functional semiconductor package, including: a processor core configurable via a plurality of configuration registers; a non-volatile storage, in which a first portion of the non-volatile storage includes permanently lockable storage that once written cannot be overwritten or modified, and in which a second portion of the non-volatile storage includes the plurality of configuration registers; a first write interface to the non-volatile storage, in which the permanently lockable storage of the non-volatile storage is wirelessly writable externally from the functional semiconductor package via the first write interface; a second write interface to the non-volatile storage through which the plurality of configuration registers are writable; configuration data for the processor core written wirelessly into the permanently lockable storage of the non-volatile storage; and in which the configuration data is distributed into the plurality of configu…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.