Flash memory device and manufacturing method thereof
US10229926B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Mar 20, 2018 |
| Grant date | Mar 12, 2019 |
| Priority date | — |
| Expiry date | Mar 20, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B69/00
Abstract
A method for manufacturing a flash memory device includes providing a substrate structure including a substrate, an insulating layer on the substrate, and a stack structure including a charge storage layer, a tunneling dielectric layer, a charge trapping layer, a blocking dielectric layer and a gate layer disposed sequentially from bottom to top on the insulating layer. The method also includes performing a selective nitriding process on the substrate structure to form a nitride layer exposed surfaces of the charge storage layer and the gate layer, and forming an isolation region on side surfaces of the stack structure. The method can mitigate the problem of an undesirable increase in the threshold voltage with an increase in the integration density of the flash memory device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.