LDMOS transistors including resurf layers and stepped-gates, and associated systems and methods
US10229993B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 13, 2017 |
| Grant date | Mar 12, 2019 |
| Priority date | — |
| Expiry date | Mar 13, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/0191
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A lateral double-diffused metal-oxide-semiconductor field effect (LDMOS) transistor includes a silicon semiconductor structure including (a) a base layer, (b) a p-type reduced surface field effect (RESURF) layer disposed over the base layer in a thickness direction, (c) a p-body disposed over the p-type RESURF layer in the thickness direction, (d) a source p+ region and a source n+ region each disposed in the p-body, (e) a high-voltage n-type laterally-diffused drain (HVNLDD) disposed adjacent to the p-body in a lateral direction orthogonal to the thickness direction, the HVNLDD contacting the p-type RESURF layer, and (f) a drain n+ region disposed in the HVNLDD. The LDMOS transistor further includes (a) a first dielectric layer disposed on the silicon semiconductor structure in the thickness direction over at least part of the p-body and the HVNLDD and (b) a first gate conductor disposed on the first dielectric layer in the thickness direction.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.