Semiconductor device
US10229994B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 31, 2016 |
| Grant date | Mar 12, 2019 |
| Priority date | — |
| Expiry date | Aug 31, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/146
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device of an embodiment includes an SiC layer having a first and a second plane, an n-type first SiC region in the SiC layer, p-type second SiC regions between the first SiC region and the first plane, n-type third SiC regions between the second SiC regions and the first plane, a gate electrode provided between two p-type second SiC regions, a gate insulating film provided between the gate electrode and the second SiC regions, a metal layer provided between two p-type second SiC regions, and having a work function of 6.5 eV or more, and a first electrode electrically connected to the metal layer, and a second electrode, the SiC layer provided between the first electrode and the second electrode, and a part of the first SiC region is disposed between the gate insulating film and the metal layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.