Computer and controlling method thereof
US10235185B2 · kind B2 · utility
Assignees
Inventor
Key dates
| Filing date | Jun 29, 2016 |
| Grant date | Mar 19, 2019 |
| Priority date | — |
| Expiry date | May 12, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/4403
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A computer has a platform controller hub (PCH), a field replaceable unit (FRU), a memory, a complex programmable logic device (CPLD) and a basic input output system (BIOS) chip. The PCH has a first port and a second port. The FRU and the memory are both electrically connected to the first port of the PCH. The CPLD is electrically connected to the second port of the PCH, and used for detecting an indicating signal from the second port to selectively generate a reset signal. The BIOS chip is electrically connected to the PCH, the FRU, and the CPLD, and used for making the computer rebooted in a manufacturer mode or a normal mode according to the reset signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.