Fabric management system and method
US10235317B1 · kind B1 · utility
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17Claims
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Key dates
| Filing date | Dec 21, 2016 |
| Grant date | Mar 19, 2019 |
| Priority date | — |
| Expiry date | Feb 1, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/4282
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A PCIe fabric is configured to couple a plurality of elements. The PCIe fabric includes a plurality of PCIe subfabrics including at least a first PCIe subfabric and a second PCIe subfabric. A primary master central processing system is configured to couple the plurality of PCIe subfabrics and includes a primary master central processing unit. The first PCIe subfabric is configured to enable multipath communication between a first element coupled to the first PCIe subfabric and a second element coupled to the second PCIe subfabric.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.