Signal driver slew rate control
US10236870B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 7, 2017 |
| Grant date | Mar 19, 2019 |
| Priority date | — |
| Expiry date | Dec 7, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C7/1057
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An apparatus includes a first circuit and a second circuit. The first circuit may be configured to generate a plurality of delayed signals each as a copy of an input signal shifted in time by a sequence of respective delays based on a control signal. At least two of the respective delays may have a different duration. The first circuit may also be configured to change a number of driver signals that are active during each delay in the sequence of respective delays based on the input signal and the plurality of delayed signals to control a slew rate of an output signal. The second circuit may be configured to drive the output signal in response to the driver signals.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.