Patent · US Active

System, apparatus and method for multi-kernel performance monitoring in a field programmable gate array

US10241885B2 · kind B2 · utility

2Cited by

0References

20Claims

0Family size

Assignee

Intel Corporation · US

Inventors

Francesc Guim Bernat · Barcelona, ES
Karthik Kumar · Chandler, US
Thomas Willhalm · Sandhausen, DE
Daniel Rivas Barragan · Cologne, DE
Patrick Lu · Chandler, US

Key dates

Filing date	Mar 16, 2017
Grant date	Mar 26, 2019
Priority date	—
Expiry date	Mar 30, 2037

Classification

Technology area (CPC G)Physics
CPC primaryG06F2201/88
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

In one embodiment, a field programmable gate array (FPGA) includes: programmable logic to perform at least one function for a processor coupled to the FPGA; a performance monitor circuit including a set of performance monitors to be programmably associated with a first kernel to execute on the FPGA; and a monitor circuit to receive kernel registration information of the first kernel from the processor and program a first set of performance monitors for association with the first kernel based on the kernel registration information. Other embodiments are described and claimed.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.