Differential amplitude detector
US10241948B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 15, 2018 |
| Grant date | Mar 26, 2019 |
| Priority date | — |
| Expiry date | May 15, 2038 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2213/0026
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An example embodiment includes an idle state detection circuit. The idle state detection circuit includes a bias current loop, a rectifying circuit loop, a voltage translating loop, and a filter circuit. The bias current loop provides a rectifying diode a forward current such that the rectifying diode detects an alternating current (AC) signal received from a transmitter via one or more transmission nodes. The rectifying circuit loop stores differential peak to peak amplitude information representative of a peak to peak amplitude of the AC signal in a first capacitor that is electrically coupled to a cathode side of the rectifying diode. The voltage translating loop converts the differential peak to peak amplitude information stored at the first capacitor to a single-end voltage signal across a first resistor that is electrically coupled to the cathode side of the rectifying diode. The filter circuit filters an AC component of the single-end voltage signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.