Integrated circuit comprising an antifuse structure and method of realizing
US10242944B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 31, 2017 |
| Grant date | Mar 26, 2019 |
| Priority date | — |
| Expiry date | May 31, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L23/5226
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An integrated circuit includes a substrate; an interconnect portion disposed over the substrate, the interconnect portion comprising multiple metallization levels separated by an insulating region; and an antifuse structure coated with a portion of the insulating region, the antifuse structure comprising a beam held at two different points by two arms, a body, and an antifuse insulating zone, the beam, the body and the arms being metal and located within a same metallization level, the body and the beam mutually making contact via the antifuse insulating zone, the antifuse insulating zone configured to undergo breakdown in the presence of a breakdown potential difference between the body and the beam.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.