Method of adjusting the parallelism of a fiber block with a chip surface
US10247890B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Mar 9, 2018 |
| Grant date | Apr 2, 2019 |
| Priority date | — |
| Expiry date | Mar 9, 2038 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG02B6/4227
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
A method of adjusting the parallelism of a surface of a block of optical fibers with a surface of a semiconductor chip or wafer laid on an XY table, including the steps of: a) providing a sensor rigidly attached to the XY table and a handling arm supporting the block, said surface facing the XY table; b) for each of three non-aligned points of the surface of the block, displacing with respect to each other the XY table and the block in the X and/or Y directions to place the sensor opposite the point, and estimating, with the sensor, the distance along the Z direction between the point and the sensor; and c) modifying the orientation of the block by means of the handling arm to provide the desired parallelism.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.