Data bus activation in an electronic device
US10248613B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 10, 2017 |
| Grant date | Apr 2, 2019 |
| Priority date | — |
| Expiry date | Apr 2, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/4291
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Data bus activation in an electronic device is provided. In one aspect, a host circuit determines a cumulative potential representing a cumulative fractional bus activation vote on a data line(s) in the data bus. The host circuit activates the data bus when the cumulative potential is greater than a configurable bus activation threshold. In another aspect, a device circuit(s) determines a selected signal strength threshold that is less than determined signal strength of an incoming signal. Accordingly, the device circuit(s) asserts a fractional potential corresponding to the selected signal strength threshold on the data line(s) as a fractional bus activation vote in the cumulative fractional bus activation vote. By activating the data bus based on the cumulative fractional bus activation vote, the host circuit can support timely data bus activation while preventing the data bus from being falsely activated, thus improving robustness of data bus activation in the electronic device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.