Method and circuit for generating a reference voltage in neuromorphic system
US10249360B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 30, 2017 |
| Grant date | Apr 2, 2019 |
| Priority date | — |
| Expiry date | Nov 30, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2013/0054
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and a circuit for generating a reference voltage are provided. The circuit includes: a first column of dummy neurons with weight 0 and a second column of dummy neurons with weight 1, wherein the plurality word-lines are connected to the dummy neurons in the first and second columns, respectively; a bit-line connected to a voltage source and the first column of dummy neurons; a complementary bit-line is connected to the voltage source and the second column of dummy neurons, wherein when the artificial neural network system is operated to sense the neurons of the memory cell array, one or more of the plurality of word-lines are activated, and the corresponding dummy neurons of the first column and the second column are activated to generate the reference voltage at the output end for sensing the neurons of the memory cell array.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.