Method for manufacturing a seal ring structure to avoid delamination defect
US10249574B2 · kind B2 · utility
4Cited by
0References
13Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jul 14, 2017 |
| Grant date | Apr 2, 2019 |
| Priority date | — |
| Expiry date | Aug 6, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L23/585
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for manufacturing a semiconductor device includes providing a semiconductor substrate, forming a plurality of integrated circuit (IC) devices on the semiconductor substrate, and forming a seal ring structure surrounding each of the IC devices. Forming the seal ring structure includes forming a plurality of interlayer dielectric layers on the semiconductor substrate, and forming a plurality of hollow through-hole structures within each of the interlayer dielectric layers.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.