Semiconductor device
US10249627B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 13, 2017 |
| Grant date | Apr 2, 2019 |
| Priority date | — |
| Expiry date | Jun 13, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B12/09
Abstract
A semiconductor device is provided. The semiconductor device includes an upper interlayer insulating layer disposed on a substrate. A first electrode spaced apart from the upper interlayer insulating layer is disposed on the substrate. A contact structure penetrating the upper interlayer insulating layer is disposed on the substrate. An upper support layer having a first portion covering an upper surface of the upper interlayer insulating layer, to surround an upper side surface of the contact structure, and a second portion extending in a horizontal direction from the first portion and surrounding an upper side surface of the first electrode, is disposed. A dielectric conformally covering the first electrode and a second electrode on the dielectric are disposed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.