Poly-silicon thin film transistor and manufacturing method thereof, array substrate and manufacturing method thereof, and display device
US10249734B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Aug 21, 2014 |
| Grant date | Apr 2, 2019 |
| Priority date | — |
| Expiry date | Aug 21, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/0231
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A poly-silicon thin film transistor and its manufacturing method, an array substrate and its manufacturing method, and a display device are provided. The method for manufacturing a poly-silicon thin film transistor includes forming a poly-silicon layer on a base substrate so that the poly-silicon layer includes a first poly-silicon area, second poly-silicon areas located at the both sides of the first poly-silicon area and third poly-silicon areas located at a side of the second poly-silicon areas away from the first poly-silicon area; forming a barrier layer between a gate electrode and a gate insulation layer by a dry etching method so that the barrier layer corresponds to the first poly-silicon area; and with the barrier layer as a mask doping the second poly-silicon areas to form lightly doped areas. By this method, the lightly doped areas may have the same length, and thus the problem of excessive leakage current is avoided.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.