Array substrate including pixel electrode and drain electrode in direct contact to each other, and method of manufacturing the same, display panel, and display device
US10254609B2 · kind B2 · utility
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8Claims
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Key dates
| Filing date | May 25, 2016 |
| Grant date | Apr 9, 2019 |
| Priority date | — |
| Expiry date | May 25, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG02F2201/123
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
An array substrate and a method of manufacturing the same, a display panel and a display device are provided. The array substrate includes a thin film transistor and a pixel electrode. An insulating layer is formed between a drain electrode of the thin film transistor and the pixel electrode. The drain electrode is in direct electrical contact with the pixel electrode through a via-hole in the insulating layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.