Cleared memory indicator
US10255069B2 · kind B2 · utility
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3References
9Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 15, 2015 |
| Grant date | Apr 9, 2019 |
| Priority date | — |
| Expiry date | Sep 15, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F3/067
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Aspects include a computer-implemented method for receiving an instruction at a processor, the instruction associated with a memory block having an address. A clear indicator that indicates whether the memory block is in a cleared state is assessed by the processor. The cleared state is a state of the memory block in which the memory block does not have any data stored therein. The method also includes determining based on the clear indicator whether the memory block is in the cleared state.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.