Intelligent PCIe slot lane assignment method
US10255224B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 22, 2017 |
| Grant date | Apr 9, 2019 |
| Priority date | — |
| Expiry date | Dec 22, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2213/0026
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An intelligent PCIe slot lane assignment method applied to a motherboard including a CPU capable of providing at least 16 lanes, a switch circuit, a PCIe slot assembly consisting of a first PCIe slot, a second PCIe slot and a third PCIe slot, and a logic controller. The intelligent control of the logic controller in detection of the insertion of a PCIe expansion card in the first PCIe slot, second PCIe slot and third PCIe slot of the PCIe slot assembly enables the switch circuit to automatically assign lanes to the first PCIe slot, second PCIe slot and third PCIe slot of the PCIe slot assembly according to the detection results, increasing the convenience of expansion application and having a higher performance and expansibility.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.