Patent · US Active

Method of manufacturing a semiconductor power package

US10256119B2 · kind B2 · utility

4Cited by

11References

20Claims

0Family size

Assignee

Infineon Technologies Austria AG · AT

Inventors

Thomas Basler · Riemerling, DE
Edward Fuergut · Nuremberg, DE
Christian Kasztelan · Munich, DE
Ralf Otremba · Kaufbeuren, DE

Key dates

Filing date	Dec 1, 2017
Grant date	Apr 9, 2019
Priority date	—
Expiry date	Dec 1, 2037

Classification

Technology area (CPC H)Electricity
CPC primaryH01L2924/181
WIPO fieldSemiconductors
WIPO sectorElectrical engineering

Abstract

A method of manufacturing a semiconductor power package includes: providing a pre-molded chip housing and an electrically conducting chip carrier cast-in-place in the pre-molded chip housing; bonding a power semiconductor chip on the electrically conducting chip carrier; and applying a covering material so as to embed the power semiconductor chip. The covering material has an elastic modulus less than an elastic modulus of a material of the pre-molded chip housing and/or a thermal conductivity greater than a thermal conductivity of the material of the pre-molded chip housing and/or a temperature stability greater than a temperature stability of the pre-molded chip housing.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.