Power factor correction circuit, multiplier and voltage feed-forward circuit
US10256716B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 25, 2016 |
| Grant date | Apr 9, 2019 |
| Priority date | — |
| Expiry date | Jan 25, 2036 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02P80/10
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A voltage feed-forward circuit, a multiplier using the voltage feed-forward circuit, and a power factor correction circuit using the multiplier. The voltage feed-forward circuit is used to maintain and output a peak voltage (Vff) of an input voltage (Vin), and includes first switch element (S1), a logic control unit (U1), a second switch element (S2), a first capacitor (C1), a third switch element (S3) and a second capacitor (C2). The first control signal (Φ1) and the second control signal (Φ2) begin to be provided at the same time, and the first control signal (Φ1) stops being provided when a voltage of the second end of the first capacitor (C1) is greater than the peak voltage (Vff) of the input voltage (Vin).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.