Technologies for managing power during an activation cycle
US10261572B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 11, 2017 |
| Grant date | Apr 16, 2019 |
| Priority date | — |
| Expiry date | Apr 11, 2037 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Technologies of managing power during an activation cycle of a processor core or other compute domain include determining new operation limits for active processor cores or other compute domains during an activation cycle of a hibernating processor core or other hibernating compute domain to reduce the likelihood of a power surge during the activation of the hibernating processor core or other compute domain. The active processor cores or other compute domain are monitored until their operating points are at or below the new operating limits. Thereafter, the hibernating processor core or other hibernating compute domain is activated.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.