Systems and methods for hardware-based raid acceleration for variable-length and out-of-order transactions
US10261698B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 16, 2017 |
| Grant date | Apr 16, 2019 |
| Priority date | — |
| Expiry date | May 16, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2213/0026
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In accordance with embodiments of the present disclosure, a method of transmitting data in an information handling system may include receiving, at a hardware logic device from a plurality of memory storage devices communicatively coupled to the hardware logic device, a plurality of command fetch requests; analyzing metadata associated with each of the plurality of command fetch requests in order to serialize the plurality of command fetch requests in a chronological order; and communicating the coalesced command fetch requests in the chronological order to a memory having stored thereon commands responsive to the coalesced command fetch requests.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.