Gate-on-array driving unit, gate-on-array driving method, gate-on-array driving circuit, and display device
US10262572B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 23, 2015 |
| Grant date | Apr 16, 2019 |
| Priority date | — |
| Expiry date | Nov 11, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2310/08
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
GOA driving unit includes an input end, a starting module, a control module, an output module and a gate driving signal output end. The starting module is configured to, within a starting time period, input a triggering signal from the input end into the control module under the control of a first clock signal. The control module is configured to, within an output time period, output a second clock signal to the output module. The output module is configured to output a first level to the gate driving signal output end within the starting time period, output the second clock signal to the gate driving signal output end within the output time period, and output the first level to the gate driving signal output end within a maintenance time period. The first clock signal is of a phase reverse to the second clock signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.