Shift register, driving method, and gate electrode drive circuit
US10262615B2 · kind B2 · utility
2Cited by
0References
20Claims
0Family size
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Key dates
| Filing date | May 20, 2016 |
| Grant date | Apr 16, 2019 |
| Priority date | — |
| Expiry date | May 20, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2310/08
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A shift register includes: a plurality of clock signal terminals; and a plurality of input terminals. The plurality input terminals are configured to provide input signals under control by one or more clock signals from one or more of the plurality of clock signal terminals to realize both a forward scan and a backward scan of the shift register.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.