Patent · US Active

Method of fabricating electrodes, method of fabricating thin film transistor, method of fabricating array substrate, thin film transistor, array substrate, and display apparatus

US10262860B2 · kind B2 · utility

0Cited by
2References
20Claims
0Family size

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Key dates

Filing dateJun 30, 2017
Grant dateApr 16, 2019
Priority date
Expiry dateJun 30, 2037

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D30/6755
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

The present application discloses a method of fabricating a plurality of electrodes. The method includes forming a hydrophobic pattern containing a hydrophobic material on a base substrate, the hydrophobic pattern has a first ridge on a first edge of the hydrophobic pattern, the hydrophobic pattern has a thickness at the first ridge greater than that in a region outside a region corresponding to the first ridge; removing a portion of the hydrophobic pattern outside the region corresponding to the first ridge; and forming a first electrode on a first side of the first ridge and a second electrode on a second side of the first ridge.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.