Readout circuit and sensing device
US10264202B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Dec 15, 2017 |
| Grant date | Apr 16, 2019 |
| Priority date | — |
| Expiry date | Dec 15, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N25/78
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A readout circuit is provided to generate an image datum representing an image sensed by a sensing array. The readout circuit includes a sample and hold circuit, an analog-digital conversion circuit, first and second memory banks, and an output circuit. The sample and hold circuit performs a sample and hold operation on at least one output signal from the sensing array to generate first and second sample-hold signals. The analog-digital conversion circuit generates first and second output datums according to the first and second sample-hold signals respectively. When the readout circuit operates in a first mode, the output circuit outputs the first and second output datums, received from the first and second memory banks, sequentially to serve as the image datum. When the readout circuit operates in a second mode, the output obtains difference between the first and second output datums to serve as the image datum.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.