Methods and apparatus to eliminate partial-redundant vector loads
US10268454B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 25, 2017 |
| Grant date | Apr 23, 2019 |
| Priority date | — |
| Expiry date | Sep 25, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/3688
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Methods, apparatus, systems and articles of manufacture are disclosed to eliminate partial-redundant vector load operations. An example apparatus includes a node grouper to associate a vector operation with a node group, a candidate verifier to perform a dependencies test on a subset of the node group, and identify a subset of the node group as a candidate when the subset satisfies the dependencies test, and a code optimizer to determine replacement code based on a characteristic of the candidate in the node group and compare an estimated cost associated with executing the replacement code to a threshold. The example apparatus also includes a code generator to generate machine code using the replacement code when the estimated cost of executing the replacement code satisfies the threshold.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.