Shift register, gate driving circuit, display panel and driving method
US10269282B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Sep 13, 2017 |
| Grant date | Apr 23, 2019 |
| Priority date | — |
| Expiry date | Sep 13, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2310/06
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A shift register, a gate driving circuit, a display panel and a driving method. The shift register includes: an input circuit, an output circuit, a pull-up-node pull-down circuit, a first control circuit, a second control circuit and an output pull-down circuit. The first control circuit is configured to write a fourth clock signal into a first pull-down node and write a first power voltage into a second pull-down node responsive to a first control signal, and to write the first power voltage into the first pull-down node responsive to a voltage of a pull-up node. The second control circuit is configured to write the fourth clock signal into the second pull-down node and write the first power voltage into the first pull-down node responsive to a second control signal, and to write the first power voltage into the second pull-down node responsive to the voltage of the pull-up node.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.