Semiconductor device including oxide semiconductor layer having regions with different resistances
US10269977B2 · kind B2 · utility
1Cited by
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8Claims
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Key dates
| Filing date | Aug 25, 2017 |
| Grant date | Apr 23, 2019 |
| Priority date | — |
| Expiry date | Aug 25, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/465
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device includes an n-type oxide semiconductor layer, a gate electrode above the oxide semiconductor layer, a gate insulation layer between the oxide semiconductor layer and the gate electrode, a first terminal connected to the oxide semiconductor layer, and a second terminal connected to the gate electrode, a potential applied to the second terminal being higher than a potential applied to the first terminal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.