Methods for controlling data transfer speed of a data storage device and a host device utilizing the same
US10275163B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 22, 2017 |
| Grant date | Apr 30, 2019 |
| Priority date | — |
| Expiry date | Jan 6, 2038 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/42
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A host device coupled to a data storage device via a predetermined interface includes a processor and a signal processing device. The processor accesses data stored in the data storage device via the predetermined interface. The signal processing device performs signal processing on the data. The processor transmits a first power mode change request packet to the data storage device via the predetermined interface, to request to change a data transfer speed of the predetermined interface from a first speed to a second speed. The processor receives a first power mode change confirm packet via the predetermined interface from the data storage device, and in response to the first power mode change confirm packet, the processor determines to keep the data transfer speed at the first speed and does not change the data transfer speed to the second speed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.