Semiconductor device with die tilt control
US10276546B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | May 2, 2018 |
| Grant date | Apr 30, 2019 |
| Priority date | — |
| Expiry date | May 2, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/37001
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device with die tilt control is disclosed. In one embodiment, a semiconductor device is provided comprising: a substrate; a first semiconductor die stacked on the substrate; and a plurality of additional semiconductor dies stacked on the first semiconductor die, wherein the plurality of additional semiconductor dies are stacked in an offset configuration, such that an edge of each of the plurality of additional semiconductor dies overhangs an edge of the semiconductor die on which it is stacked; wherein a thickness of a top-most semiconductor die of the plurality of additional semiconductor dies is greater than a thickness of any of the other additional semiconductor dies. Other embodiments are provided.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.