Continuous-time analog-to-digital converter
US10277241B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 24, 2018 |
| Grant date | Apr 30, 2019 |
| Priority date | — |
| Expiry date | Apr 24, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M3/496
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A continuous-time analog-to-digital converter (ADC) includes a plurality of integrators selectively coupled in series. The ADC may further include a quantizer with excess loop delay (ELD) compensation. The quantizer may be coupled in series to a least one integrator. The ELD compensation may be programmable based on a transfer function of the ADC. The ADC may further include parallel digital-to-analog converters (DACs). Each DAC may have an input coupled to an output of the quantizer, and an output coupled to an input of a corresponding integrator. The ADC may further include a bypass path coupled to an input or output of one of the integrators. The bypass path may be configured to selectively bypass one or more of the integrators to change the transfer function of the ADC.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.