Method for CPU/heatsink anti-tip and socket damage prevention
US10281962B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 12, 2018 |
| Grant date | May 7, 2019 |
| Priority date | — |
| Expiry date | Feb 12, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L23/427
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An information handling system (IHS) includes a heatsink retention apparatus. A processor mounted on a board receives a heatsink base having peripheral, spaced apertures. At least two latching mechanisms include a mounting portion received respectively in peripheral, spaced apertures on opposites sides of the heatsink base. A latching surface is mounted to one of (i) the heatsink base and (ii) a terminal portion of the mounting portion to engage respectively with either the mounting portion or an upper edge of the corresponding peripheral, spaced aperture of the heatsink base. At least two peripheral, spaced loading screws are sized to be engageable by loading nuts when the heatsink base is positioned not higher than the engagement height. The engaged, at least two, latching mechanisms prevent tipping of the heatsink base during loading of the at least two peripheral, spaced loading screws with the at least two spaced apart loading nuts.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.