Semiconductor device and method for fabricating the same
US10283509B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 5, 2017 |
| Grant date | May 7, 2019 |
| Priority date | — |
| Expiry date | Oct 5, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D1/692
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor device is provided. The semiconductor device includes a substrate which includes a cell region including first and second regions, and a peri region more adjacent to the second region than adjacent to the first region, first and second lower electrodes disposed in the first and second regions, respectively, first and second lower support patterns disposed on outer walls of the first and second lower electrodes, respectively, an upper support pattern disposed on outer walls of the first and second lower electrodes, and being on and spaced apart from the first and second lower support patterns, a dielectric layer disposed on surfaces of the first and second lower electrodes, the first and second lower support patterns, and the upper support pattern, and an upper electrode disposed on a surface of the dielectric layer, wherein thickness of the first lower support pattern is smaller than thickness of the second lower support pattern.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.