Radiation detector assembly
US10283557B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 31, 2015 |
| Grant date | May 7, 2019 |
| Priority date | — |
| Expiry date | Sep 2, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10F39/806
- WIPO fieldEnvironmental technology
- WIPO sectorChemistry
Abstract
Various approaches are discussed for using four-side buttable CMOS tiles to fabricate detector panels, including large-area detector panels. Fabrication may utilize pads and interconnect structures formed on the top or bottom of the CMOS tiles. Electrical connection and readout may utilize readout and digitization circuitry provided on the CMOS tiles themselves such that readout of groups or sub-arrays of pixels occurs at the tile level, while tiles are then readout at the detector level such that readout operations are tiered or multi-level.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.