Methods for fabricating semiconductor devices using a multilayer lithography process
US10290509B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 27, 2017 |
| Grant date | May 14, 2019 |
| Priority date | — |
| Expiry date | May 10, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B12/09
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Example embodiments relate to a method for fabricating a semiconductor device. The method for fabricating a semiconductor device includes stacking on a substrate an etching target layer, a first mask layer, and a photoresist layer, irradiating extreme ultraviolet (EUV) radiation on the photoresist layer to form a photoresist pattern, patterning the first mask layer to form a first mask pattern using the photoresist pattern as an etching mask, and patterning the etching target layer to form a target pattern using the first mask pattern as an etching mask. The first mask layer includes at least one of a silicon layer and a titanium oxide layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.