Forming an isolation barrier in an isolator
US10290532B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 19, 2017 |
| Grant date | May 14, 2019 |
| Priority date | — |
| Expiry date | May 19, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/115
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Integrated digital isolators comprise a first transformer coil or capacitor plate mounted on an integrated circuit substrate, and separated from a second transformer coil or capacitor plate via an electrically insulating isolation layer. The electrical isolation that is achieved is dependent upon the material and thickness of the isolation layer. In order to reduce the amount of time required for fabrication while still allowing thick isolation layers to be deployed, in examples of the disclosure pre-formed sheets or tapes of dielectric material are applied to the substrate over the first transformer coil or capacitive plate, for example by being rolled onto the substrate using a heated roller. Such a technique results in a thick isolation layer that is formed using a simple process and much more quickly and reliably than conventional spin-coating or deposition techniques.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.