Programmable logic device with integrated high voltage power FET
US10291229B2 · kind B2 · utility
1Cited by
11References
18Claims
0Family size
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Key dates
| Filing date | Dec 26, 2017 |
| Grant date | May 14, 2019 |
| Priority date | — |
| Expiry date | Dec 26, 2037 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02B70/10
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A programmable logic device (PLD) includes a programmable fabric, a plurality of input/output (I/O) blocks, and a plurality of high voltage power field effect transistors (FETs). The PLD can be programmed to connect one or more of the plurality of I/O blocks, one or more of the plurality of high voltage power transistors via the programmable fabric. Each of the plurality of high voltage power transistors includes a drain pad and a source pad that are exposed via external pins of the PLD.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.