Information processing device, method of controlling a cache memory, and storage medium
US10296466B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Apr 12, 2017 |
| Grant date | May 21, 2019 |
| Priority date | — |
| Expiry date | Sep 29, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/60
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A device includes: a cache memory configured to store a first list and a second list, and a processor. The first list includes one or more entries that include any one of data pieces in a storage device and information indicating a location of the data piece on the storage device, and the second list includes one or more entries that include information indicating a location of an already discarded data piece on the storage device, the already discarded data piece having been included in an entry that has been evicted from the first list. The processor counts a count number of entries including data pieces updated and being consecutive from an eviction target entry when updating data piece of an entry in the first list, and writes data of a target entry in the storage device and discards the data from the cache memory based on a certain rule.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.