Patent · US Active

Dynamic re-allocation of computer bus lanes

US10296484B2 · kind B2 · utility

1Cited by
18References
20Claims
0Family size

Assignee

Inventors

Key dates

Filing dateDec 1, 2015
Grant dateMay 21, 2019
Priority date
Expiry dateDec 1, 2035

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F13/4022
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

The embodiments relate to dynamically re-allocating lanes of a computer bus. A computer system having a processor in communication with a module is booted. Allocation of lanes among adapters in communication with connectors of the computer bus is controlled at boot-time and, in response to detection of an additional adapter received after boot-time, an additional allocation of lanes to the additional adapter is dynamically controlled. The additional allocation includes allocating unallocated lanes to the additional adapter, and re-allocating at least one lane from the initial allocation in response to the unallocated lanes being insufficient.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.