Patent · US Active

Secure integrated-circuit state management

US10296738B2 · kind B2 · utility

0Cited by
8References
14Claims
0Family size

Assignee

Inventors

Key dates

Filing dateMay 3, 2017
Grant dateMay 21, 2019
Priority date
Expiry dateDec 7, 2037

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F2212/7204
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

An apparatus includes a Non-Volatile Memory (NVM) and a controller. The controller is configured to store in the NVM a state array, which includes multiple words. In each word, one or more bits are designated as lock-bits. The controller is further configured to set an operational state for the apparatus based on the lock-bits of the state array, by (i) deciding whether each word in the state array is locked or unlocked by comparing the lock-bits of that word to respective expected lock values, (ii) if all the words in the state array are found locked, setting the apparatus to a locked state, (iii) if all the words in the state array are found unlocked, setting the apparatus to an unlocked state, and (iv) if one or more of the words are found locked and one or more other words are found unlocked, setting the apparatus to an error state.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.